What registers control the Sleep Timer on the EM250?
In terms of the register-based configuration of the Sleep Timer on the EM250 platform, this is very much like using the two general-purpose user timers (Timer1 and Timer2), just with a much smaller set of registers and configuration options…
Below is a table that lists a register or flag/bitmask, its counterpart in the context of Timer1 (so that you can examine the datasheet description of the general-purpose timers to get a feel for how these registers/flags are used in timer configuration), and a brief summary of the purpose of each:
| Sleep Timer value | Timer1 value | Description |
| halInternalSleepTimerIsr | halTimerIsr | Interrupt Service Routine [ISR] invoked by the HAL when timer interrupt occurs |
| INT_SLEEP | INT_TMR | Flag specifying interrupt type in INT_CFG, INT_FLAG or INT_MISS register |
| SLEEP_TIMER_INT_SRC | INT_TMRFLAG | Reg for determining cause of timer interrupt |
| SLEEP_TIMER_INT_SRC_SLEEP_WRAP_SRC | INT_TMR1WRAP | Bitmask in xxx_INT_SRC register to signify tmr int due to timer wrap |
| SLEEP_TIMER_INT_SRC_SLEEP_COMP_A_SRC | INT_TMR1CMPA | Bitmask in xxx_INT_SRC register to signify tmr int due to reaching Compare A target |
| SLEEP_TIMER_INT_SRC_SLEEP_COMP_B_SRC | INT_TMR1CMPB | Bitmask in xxx_INT_SRC register to signify tmr int due to reaching Compare B target |
| SLEEP_CONFIG | TMR1_CFG | Timer configuration register |
| SLEEP_CONFIG_CLK_SEL | TMR_CLK | Bitmask in timer config reg to set clock source |
| SLEEP_CONFIG_CLK_DIV | TMR_PSCL | Bitmask in timer config reg to set clock divider (prescaler) |
| SLEEP_CONFIG_ENABLE | TMR_EN | Bitmask in timer config reg to enable timer counting |
| SLEEP_TIMER_INT_MASK_REG | INT_TMRCFG | Register for setting timer’s interrupt mask |
| SLEEP_TIMER_INT_MASK_SLEEP_WRAP_MSK | INT_TMR1WRAP | Bitmask in int mask config reg to enable int on timer overflow (“wrap”) |
| SLEEP_TIMER_INT_MASK_SLEEP_COMP_A_MSK | INT_TMR1CMPA | Bitmask in int mask config reg to enable int on Compare A reached |
| SLEEP_TIMER_INT_MASK_SLEEP_COMP_B_MSK | INT_TMR1CMPB | Bitmask in int mask config reg to enable int on Compare B reached |
| SLEEP_COUNT | TMR1_CNT | Counter for current value of timer |
| SLEEP_COMP_A | TMR1_CMPA | Compare A target value for timer |
| SLEEP_COMP_B | TMR1_CMPB | Compare B target value for timer |
…Note that the sleep timer (like the general-purpose timers) has 16-bit precision.
Also, for further reference, below are the clock selection values:
- 0: 1kHz internal RC
- 1: 32.768kHz external oscillator
- 2: 12MHz external crystal
- 3: TMRxCLK external timer input from GPIO
…Note that only the first two are available for sleep timer sources, which is why SLEEP_CONFIG_CLK_SEL is only one bit, whereas TMR_CLK is two bits.
For more illustration of how these registers are used, see hal/micro/xap2b/em250/system-timer.c.
